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Given the following snipet of Verilog code draw out the waveforms for clk ...

Electrical Engineering Technical Interview Questions and Answers

(Continued from previous question...)

3. Given the following snipet of Verilog code draw out the waveforms for clk ...

Given the following snipet of Verilog code, draw out the waveforms for clk and a
always @(clk) begin
a = 0;
#5 a = 1;
end



       10      30      50      70      90     110     130
        ___     ___     ___     ___     ___     ___     ___
clk ___|   |___|   |___|   |___|   |___|   |___|   |___|   |___


a   ___________________________________________________________


This obviously is not what we wanted, so to get closer, you could use
"always @ (posedge clk)" instead, and you'd get

       10      30      50      70      90     110     130
        ___     ___     ___     ___     ___     ___     ___
clk ___|   |___|   |___|   |___|   |___|   |___|   |___|   |___

                            ___                     ___
a   _______________________|   |___________________|   |_______

(Continued on next question...)

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